Saturday, November 16, 2019

Traffic Light Controller System Design

Traffic Light Controller System Design library IEEE; use IEEE.STD_LOGIC_1164.ALL; use ieee.std_logic_unsigned.all; Uncomment the following library declaration if using arithmetic functions with Signed or Unsigned values use IEEE.NUMERIC_STD.ALL; Uncomment the following library declaration if instantiating any Xilinx primitives in this code. library UNISIM; use UNISIM.VComponents.all; entity tlc is   Ã‚  Ã‚   Port ( sensor : in   STD_LOGIC_VECTOR (3 downto 0);    hr : out   STD_LOGIC_VECTOR (0 downto 0) ;   Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚   hg : out   STD_LOGIC_VECTOR (0 downto 0) ;   Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚   hy : out   STD_LOGIC_VECTOR (0 downto 0) ;   Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚   fr : out   STD_LOGIC_VECTOR (0 downto 0) ;   Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚   fg : out   STD_LOGIC_VECTOR (0 downto 0) ;   Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚   fy : out   STD_LOGIC_VECTOR (0 downto 0) ); end tlc; architecture Behavioral of tlc is signal ts : std_logic_vector(3 downto 0); signal tm : std_logic_vector(3 downto 0); signal tl : std_logic_vector(3 downto 0); type state_type is (s0,s1,s2); signal state : state_type; begin process (sensor) begin if sensor

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